
It is expected that the throughput and power consumption of RF transmitters will improve dramatically when compensated by digital signal processing. The main aims of this programme are to design a highly efficient transmitter (including CMOS PA) which is assisted by digital signal processing, to produce prototypes, and to evaluate the results.
Candidates should possess expertise on RF power amplifiers and designing using EDA tools.
Internet and Ethernet technologies are increasingly being applied to social infrastructure areas including industrial networks and power control networks for smart grid implementation. Social infrastructure applications require highly reliable networks as compared to the current Internet; therefore these networks must be implemented more carefully. For example, redundant network design, real-time transmission capability, or thorough testing is essential to prevent failures in practical use. The research targets are: (1) the design of a robust industrial network architecture and (2) the test design methodology for network and protocol to implement highly reliable networks. This research is expected to cover the field represented by IEEE Trans. on Communications and IEEE Trans. on Reliability.
Candidates should have a general knowledge of networks and their design with FPGA's. They are required to have general programming and hardware design skills. They should also be highly aware of the above issues and have solution ideas or proposals.